Without limiting the scope of the invention, its background is described in connection with a detector circuit used in a RF power detector.
In a wireless communication system, for example, a Global System for Mobile (GSM) system using a Time Division Multiple Access (TDMA) signaling format that includes a framed structure comprising eight time slots, a mobile station communicates with a base station by transmitting and receiving information in one or more of the time slots that comprise a channel. Each channel is assigned to a different user, with mobile-to-base transmission (uplink) on one frequency band and base-to-mobile (downlink) on a second frequency band.
In order to preserve the integrity of the transmitted and received information and to reduce adjacent channel interference, the system operates according to a standardized format that defines the requirements of transmission and reception. A system transmitting and receiving information often produces unwanted interference. This unwanted interference affects the integrity of the transmitted and received information. For example, a power control loop uses negative feedback to adjust the operating point of a power amplifier so that the power amplifier operates in a specified range. However, unwanted interference parameters inherent in the operation of the power control loop may cause an inaccurate representation of the information to be controlled in the feedback loop resulting in inaccurate adjustment of the power amplifier's operating point.
The feedback control loop controls the operation of the power amplifier by using a RF power detector to sample the output signal and compare the output signal with a reference signal, where the reference signal is proportional to the required output. The RF power detector output is used as an error signal to adjust the power amplifier's operating point to correct any unwanted deviations detected at the output. Unwanted interference parameters of the RF power detector could affect the signals in the loop and may result in an incorrect adjustment of the power amplifier.
RF power detectors comprise a detector circuit and a linearizer. The detector circuit rectifies a detected portion of RF input power and the linearizer outputs a linear voltage. The relationship between detected voltage and RF input is linear for high power levels and square law for low power levels. The linear circuit is required to amplify the square law region and thus increases the power detectors dynamic range. The generation of unwanted parameters inherent in the operation of the detector circuit and linearizer affects the linear relationship between the RF power detector output and RF input at low power levels, thus reducing the detector's dynamic range.
Reference is now made to FIG. 1 where a prior art RF power detector is illustrated and denoted generally as 10. RF power detector 10 comprises a detector circuit 12 for receiving a RF input power P.sub.in and a linearizer 14 for supplying a linear voltage. Detector circuit 12 comprises a diode D for detecting a level, detected voltage V.sub.det, of RF input power P.sub.in. Diode D comprises an anode coupled to RF input power P.sub.in and a cathode coupled to linearizer 14 through a capacitor C and a resistor R. Diode D is biased by a bias current I.sub.b from a bias voltage source -V.sub.s coupled to diode D through a resistor R.sub.b. Biasing diode D creates a voltage drop V.sub.D that is a function of varying operating temperatures of diode D.
Linearizer 14 may comprise a compensated logarithmic amplifier 16 such as the one described in co-pending U.S. patent application, filed Jul. 16, 1999, Ser. No. 09/354,984. Compensated logarithmic amplifier 16 comprises a logarithmic amplifier 18 and a compensation circuit 20 for removing unwanted parameters from a power detector output V.sub.out. The operational effect of compensated logarithmic amplifier 16 is represented as a external voltage source V.sub.a independent of the operation of detector circuit 12. A detector voltage V.sub.c across capacitor C is coupled to linearizer 14 through resistor R producing a detector current I.sub.c supplied to linearizer 14. Ideally detector output voltage V.sub.c should equal detected voltage V.sub.det, however, operational affects of diode D, voltage drop V.sub.D, and external voltage source V.sub.a affect detector current I.sub.c causing a misrepresentation of RF input power P.sub.in. ##EQU1##
When there is no RF input applied under normal DC bias saturation there should be no detector current I.sub.c. However, with diode voltage V.sub.D and voltage source V.sub.a detector current I.sub.c does not equal zero as can be seen from equation 2. ##EQU2##
Typically, voltage drop V.sub.D and external voltage source V.sub.a are compensated using bias point tuning in both detector circuit 12 and linearizer 14. However, bias point tuning hinders design flexibility since tuning of one circuit is dependent on operational affects of the other circuit. Therefore, detector circuit 12 and linearizer 14 when designed must consider biasing measures used in the other circuit.
As may be seen from Equation 1 and Equation 2, an improved apparatus to effectively remove unwanted parameters affecting the output of a detecting circuit could improve the precision and design characteristics of RF power detector.